DAC heads up

I have this obsession with making every project I work on as minimalistic as possible while retaining specified functionality. I guess that is central to my view of the world 🙂

Following that driver, when connecting the DAC to the CMOD, I just followed the ‘minimal pins’ guidelines offered in the Adafruit ‘s website here.

Specifically, the part where it goes:

You can set it up to take an input system/master clock but we default-set it to just generate it for you, so you only need to connect Data In, Word Select (Left/Right Clock) and Bit Clock lines. If you want, there’s a mute pin and a de-emphasis filter you can turn on.

So did I. If you take a look at the wiring diagrams, you’ll see that only those pins are connected. This setup has been working for me in both XFM2 and XVA1 in more than 20 builds I made for myself and friends.

However, I have a couple of builders who have reported their setup working with XFM2 and not XVA1, and somehow they have fixed it by setting a few of the unconnected pins to certain states.

One of the unconnected pins is PLL. This pin is used in the DAC to switch between Audio and Video modes. Both synths use Audio mode, so this pin should be at low stage. Looking at the Adafruit board, the pin has an included pulldown resistor. However, it’s worth a try connecting it to ground just in case the board has the resistor missing.

Other of the pins is SCLK. This one is a bit more puzzling.

Reading the UDA1334 datasheet, it’s apparent that the SCLK pin should be set to HIGH (3V3) for samplerates above 50kHz (which is the case for XVA1), and LOW (GND) for samplerates below 50kHz (which is the case for XFM2.

However, in the Adafruit’s documentation, it’s stated that the IC will infer the samplerate from the BCLK pin. And in fact, this is what happened in every build I crafted.

I’m curious on what’s your experience if you built both synths. I’ll implement a “hi-lo” switch from the FPGA if this is really needed.